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We present a low phase noise four-core triple-band voltage controlled-oscillator (VCO) with reconfigurable oscillator cores and multi-mode resonator. By activation/deactivation of oscillator cores and change of resonator impedance in three modes of operations, the proposed VCO provides complete freedom in selecting the resonance frequency for three operation bands in the mm-wave range. Compared to VCOs using switch-capacitor-bank for multi-band operation, the proposed VCO does not use any series switches with passive components in the resonator to provide a low phase noise in all three bands of operation. As a proof of concept, the proposed four-core triple-band VCO is implemented in a 65 nm CMOS process using four class-D oscillators with tail switches and a compact high-Q triple-mode resonator. The VCO oscillation frequencies center at 19, 28, and 38 GHz while providing good phase noise and low power consumption in all bands. Measured results show the total frequency tuning range (FTR) of 38.5% while the PN at 1MHz offset varies from -100.3 dBc/Hz to -106.06dBc/Hz resulting in an excellent FoMT of 199.8 dBc/Hz. 

In the baseband time delay (TD) elements used for delay compensation in discrete-time beamformers, phase interpolator (PI) plays a crucial role as the resolution of the PI defines the delay resolution of the TD. In this paper, we present a process and temperature invariant high-resolution and highly linear low-power PI. The proposed PI uses current integration which generates an adaptable constant slope-and-swing ramp signal to achieve low power. By switched-capacitor bias generation, the PI linearity is enhanced with 0.2 LSB DNL and 0.3 LSB INL, respectively. The 7-bit PI is realized in 65nm CMOS technology can generate the full range delay with a resolution of 8psec with the input of 1GHz. The PI consumes a power of 345μW and occupies an active area of 0.021mm2. Keywords—Ramp-rate tracking, constant slope-and-swing, phase interpolator, ramp-based, baseband time delay 

Radio frequency interference (RFI) in a devastating problem for high-sensitivity phased arrays. This paper explores a method of mitigating RFI in a receiving array using a combination of true-time delay with a truncated Hadamard projection that can place a wide-band spatial null over the RFI. The operations involved can be performed with analog circuity before sampling for the digital signal processing engine in order to enhance dynamic range. The modified beamformer solution is briefly derived and performance is compared to the existing maximum SINR beamformer using analytical phasor domain models. The results show successful null placement at the expense of control of the main lobe shape and side lobe levels. 

This paper presents a new continually-stepped variable gain low-noise-amplifier (CSVG-LNA) for millimeter-wave (mm-wave) 5G communications. The proposed variable-gain functionality in a two-stage LNA is achieved by incorporating a tunable-transformer at the 2nd-stage. The tunability in coupling-coefficient of the transformer allows to change the output matching of the LNA in a continuous fashion thus enabling a design of CSVG-LNA. The proposed CSVG-LNA alleviates high power consumption and large noise-figure (NF) variation problems in traditional approaches. To validate the proposed idea, we fabricated a CSVG-LNA in 65-nm CMOS process. The CSVG-LNA achieves measured 6.2dB of gain-tunability range while producing 18.2dB of peak S21 and <;4.1dB of NF 28GHz. Further, the NF variation is only ~0.2dB across the entire 6.2dB gain-tuning range. The 3dB bandwidth of CSVG-LNA is about 12GHz (22-34GHz) while it consumes only 9.8mW of dc power. The CSVG-LNA occupies a compact core area of 0.2mm2. The proposed CSVG-LNA achieves 1.5X improvement in FoM in comparison to state-of-the-arts mm-wave variable-gain CMOS LNAs. 

This paper presents a dual-band RF rectifying circuit for wireless power transmission at 1.17 GHz and 2.4 GHz. A dual-band harmonic-tuned inverse-class F/class-F mode power amplifier using a 10 W GaN device has been utilized to implement the proposed rectifier with an on-board coupler and phase shifter. The matching circuit is precisely designed so that the circuit operates in inverse class F and class F mode in the lower and upper frequency bands using dual-band harmonic tuning, respectively. Measurement results show that the rectifier circuit has 78% and 76% efficiencies at 1.17 GHz and 2.4 GHz frequency bands, respectively. To the best of the authors' knowledge, this rectifier is the first demonstration of a dual-band harmonic-tuned synchronous rectifier using a GaN HEMT device with an integrated coupler and phase-shifter for a watt-level RF input power.